AUTOMATION-->COMMUNICATION PROTOCOLS

UART- Universal Asynchronous Receiver/Transmitter

UART stands for Universal Asynchronous Receiver/Transmitter. UART is a short distance communication system was developed by Gordon Bell at Digital Equipment Corporation in the 1960's. UART is a serial communication device that performs parallel to serial data conversion at the transmitter side and serial to parallel conversion at the receiver side. It is universal because data speed, transfer speed is configurable. It can be connected to Microcontroller, Microprocessor or PC. A UART's main purpose is to transmit and receive serial data.

The letter ‘A’ in UART stands for Asynchronous. There is no clock signal to synchronize or validate the data transfer from transmitter and received by the receiver. It is opposite to synchronization.

In UART, transmitter and receiver must agree on timing parameters. Also, UART uses special bits at the beginning and ending of each data word to synchronize the transmitter and receiver. The point of synchronization is managed by having the same baud rate on both devices.

The UART interface consists of two pins: the Rx and Tx pin. The Rx pin is used to receive data. The Tx pin is used to transmit data. When two devices are connected using a UART, the Rx pin of one device is connected to the Tx pin of the second device.

The UART involves Parallel to serial and serial to parallel data conversion shift registers are an essential part of a UART hardware. Two shift registers are used ,one at the transmitter side and another at the receiver side.

UART FRAME FORMAT:

UART frame consists of

1.Start/Stop bits
2.Data bits
3.Parity bits (optional)

Data Transmission

In UART, the mode of transmission is in the form of a packet. The piece that connects the transmitter and receiver includes the creation of serial packets and controls those physical hardware lines. A packet consists of a start bit, data frame, a parity bit, and stop bits

Start Bit

The UART data transmission line is normally held at a high voltage level when it’s not transmitting data. To start the transfer of data, the transmitting UART pulls the transmission line from high to low for one (1) clock cycle. When the receiving UART detects the high to low voltage transition, it begins reading the bits in the data frame at the frequency of the baud rate.

Data Frame

The data frame contains the actual data being transferred. It can be five (5) bits up to eight (8) bits long if a parity bit is used. If no parity bit is used, the data frame can be nine (9) bits long. In most cases, the data is sent with the least significant bit first.

Parity

Parity describes the evenness or oddness of a number. The parity bit is a way for the receiving UART to tell if any data has changed during transmission. Bits can be changed by electromagnetic radiation, mismatched baud rates, or long-distance data transfers.
After the receiving UART reads the data frame, it counts the number of bits with a value of 1 and checks if the total is an even or odd number. If the parity bit is a 0 (even parity), the 1 or logic-high bit in the data frame should total to an even number. If the parity bit is a 1 (odd parity), the 1 bit or logic highs in the data frame should total to an odd number.
When the parity bit matches the data, the UART knows that the transmission was free of errors.

Stop Bits

To signal the end of the data packet, the sending UART drives the data transmission line from a low voltage to a high voltage for one (1) to two (2) bit(s) duration.

Steps of UART Transmission

Step1: The transmitting UART receives data in parallel from the data bus.
Step2: The transmitting UART adds the start bit, parity bit, and the stop bit(s) to the data frame.
Step3: The entire packet is sent serially starting from start bit to stop bit from the transmitting UART to the receiving UART. The receiving UART samples the data line at the preconfigured baud rate.
Step4: The receiving UART discards the start bit, parity bit, and stop bit from the data frame.
Step5: The receiving UART converts the serial data back into parallel and transfers it to the data bus on the receiving end.

Registors used in UART:

Baud Rate Generator Formula:

UART Register Configuration

Now lets see how to configure the individual registers for UART communication.

CSRC: Clock Source Select bit
Asynchronous mode: Don’t care.
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: USART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
BRGH: High Baud Rate Select bit
1 = High speed
0 = Low speed
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: 9th bit of Transmit Data, can be Parity bit

SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)
0 = Serial port disabled
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode:Don’t care.
CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables continuous receive
0 = Disables continuous receive
ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enables interrupt and load of the receive buffer when RSR is set
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: 9th bit of Received Data (can be parity bit but must be calculated by user firmware)

Functions for UART:

//transmitter UART
void transmit(char b)
{
TXREG=b;
while(TXIF==0);
TXIF=0;
}
//Receiver UART
void receive()
{
while(RCIF==0);
x=RCREG;
transmit(x);
RCIF=0;
}

STIMULATION OUTPUT:

ADVANTAGES:

1.Require only two wires for full duplex data transmission
2.No need for clock or any other timing signal.
3.Parity bit ensure error checking is integrated in to the data packet frame.

DISADVANTAGES:

1.size of the data in the frame in limited.
2.Speed for data transfer is less compared to parallel communication.
3.Transmitter and Receiver must agree to the rules of transmission and appropriate baud rate must be selected.